Difference between revisions of "User:Pmcg521"
From REU@MU
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<tr><td> Began working on the context switch for the 64-bit architecture.</td></tr> | <tr><td> Began working on the context switch for the 64-bit architecture.</td></tr> | ||
<tr><td> Finishing work on the files necessary for context switching and rescheduling.</td></tr> | <tr><td> Finishing work on the files necessary for context switching and rescheduling.</td></tr> | ||
| − | <tr><th style="font-family:verdana; border-bottom: 2px solid #000000; border-top: 2px solid #000000">'''Week | + | <tr><th style="font-family:verdana; border-bottom: 2px solid #000000; border-top: 2px solid #000000">'''Week 4: June 19-23'''</th></tr> |
<tr><td> Continue working on the boot functions of our implementation. Finished the Research Conduct course.</td></tr> | <tr><td> Continue working on the boot functions of our implementation. Finished the Research Conduct course.</td></tr> | ||
<tr><td> Read about register manipulation in the ARM guide. Continue working on process creation.</td></tr> | <tr><td> Read about register manipulation in the ARM guide. Continue working on process creation.</td></tr> | ||
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<tr><td> Read guides to porting from ARM32 to ARM64. Digging deep for a solution to a memory allocation problem.</td></tr> | <tr><td> Read guides to porting from ARM32 to ARM64. Digging deep for a solution to a memory allocation problem.</td></tr> | ||
<tr><td> Read about ATAGS and what steps need to be taken to ensure the proper accessible RAM amount.</td></tr> | <tr><td> Read about ATAGS and what steps need to be taken to ensure the proper accessible RAM amount.</td></tr> | ||
| − | <tr><th style="font-family:verdana; border-bottom: 2px solid #000000; border-top: 2px solid #000000">'''Week | + | <tr><th style="font-family:verdana; border-bottom: 2px solid #000000; border-top: 2px solid #000000">'''Week 5: June 26-30'''</th></tr> |
<tr><td> Narrowed down the memory issue to an Aarch64-specific register-load requirement. Working on the fix.</td></tr> | <tr><td> Narrowed down the memory issue to an Aarch64-specific register-load requirement. Working on the fix.</td></tr> | ||
</table> | </table> | ||
Revision as of 17:24, 31 July 2017
Patrick J. McGee
Error creating thumbnail: Unable to save thumbnail to destination |
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Logs
| Week 1: May 30-June 2 |
|---|
| Began attempts to boot the full version of Embedded Xinu kernel with Raspberry Pi 3 |
| Researched a Linaro Cross-Compiler to use for its Cortex A-53 ARM processor with ARMv8 architecture |
| Drew diagrams of the boot sequence and compilation for better understanding of the Pi 3's mechanisms |
| Traced through the dynamics of written Assembly code in the full research version of Xinu |
| Week 2: June 5-9 |
| Tested the LED program in updated Assembly code. Began testing the Serial Port Transceiver driver for the Pi 3 |
| Read about Raspberry Pi bare metal programming via online sources |
| Read about how the Raspberry Pi 3 controls the frequency of its UART pins |
| Read ARM processor documentation about configuring UART clock frequency |
| Used the oscilloscope in attempt to obtain the clock frequency of the UART pin |
| Week 3: June 12-16 |
| Read an online textbook about the ARM processor of the Pi 3. |
| Successfully controlled the PL011 UART with a 48MHz frequency. Began porting full version of Xinu. |
| Read ARM64 documentation on registers to use with process interrupt handling. |
| Began working on the context switch for the 64-bit architecture. |
| Finishing work on the files necessary for context switching and rescheduling. |
| Week 4: June 19-23 |
| Continue working on the boot functions of our implementation. Finished the Research Conduct course. |
| Read about register manipulation in the ARM guide. Continue working on process creation. |
| Begin researching physical memory space in the Pi 3. |
| Read guides to porting from ARM32 to ARM64. Digging deep for a solution to a memory allocation problem. |
| Read about ATAGS and what steps need to be taken to ensure the proper accessible RAM amount. |
| Week 5: June 26-30 |
| Narrowed down the memory issue to an Aarch64-specific register-load requirement. Working on the fix. |
