Difference between revisions of "User:Jpfeiffer1"

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<tr><td>After finding an issue with the hardware attached to the raspberry pis we looked at how the transceivers were implemented with the MIPs router and looked into porting implementation over to the RPI 3B+.</td>
 
<tr><td>After finding an issue with the hardware attached to the raspberry pis we looked at how the transceivers were implemented with the MIPs router and looked into porting implementation over to the RPI 3B+.</td>
 
<tr><td>Once we found how the transceiver boards were implemented on the MIPS routers, we developed a prototype and to test with the RPI3 B+, and it worked!</td></tr>
 
<tr><td>Once we found how the transceiver boards were implemented on the MIPS routers, we developed a prototype and to test with the RPI3 B+, and it worked!</td></tr>
 +
<tr><td>We created a couple more with the parts we had and tested them as we went.</td></tr>
 +
<tr><th style="font-family:verdana; border-bottom: 2px solid #000000; border-top: 2px solid #000000; background: #edb52a"><b>Week 2: Jun 3 - Jun 10</b></th></tr>
 
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Revision as of 14:13, 3 June 2019

Week 1: May 28 - May 31
Had program overview and went over potential research topics .
Started by looking at the serial port issues that would surface during the semester of Operating Systems while using XINU with the raspberry pi 3 b+. Our first step was to identify the issue, and what was the common cause.
After finding an issue with the hardware attached to the raspberry pis we looked at how the transceivers were implemented with the MIPs router and looked into porting implementation over to the RPI 3B+.
Once we found how the transceiver boards were implemented on the MIPS routers, we developed a prototype and to test with the RPI3 B+, and it worked!
We created a couple more with the parts we had and tested them as we went.
Week 2: Jun 3 - Jun 10