Difference between revisions of "User:Bweither"
From REU@MU
(→Weekly Log) |
|||
(One intermediate revision by the same user not shown) | |||
Line 4: | Line 4: | ||
* Met other REU students | * Met other REU students | ||
* Familiarized with Git versions of Research Xinu | * Familiarized with Git versions of Research Xinu | ||
− | |||
===Week 2=== | ===Week 2=== | ||
Line 11: | Line 10: | ||
* Struggling with multicore resched | * Struggling with multicore resched | ||
* All printing after shell established breaks shell, can this change? | * All printing after shell established breaks shell, can this change? | ||
+ | |||
+ | ===Week 3=== | ||
+ | * Disabled shell to enable Kprintf | ||
+ | * Turned off single core clock | ||
+ | * Scheduled processes on all 4 cores without timer/preemption | ||
+ | * Shared ready list | ||
+ | * Locked ready list with Mutex | ||
+ | |||
+ | ===Week 4=== | ||
+ | * Tried to find documentation for BCM 2837 Chip | ||
+ | * Only able to find documentation for BCM 2835 | ||
+ | * Decided to use Local Timer clock to generate interrupts | ||
+ | |||
+ | ===Week 5=== | ||
+ | * Set up Local Timer, enabling timer | ||
+ | * Unmasked Local Timer IRQ on routing side | ||
+ | * Enabling IRQ from Local Timer crashes program | ||
+ | * What is LT IRQ number on ARM side? | ||
+ | |||
+ | ===Week 6=== | ||
+ | * Poured through ARM A53 documentation to try to find IRQ num for Local Timer | ||
+ | * Looked over ARM vA7 documentation to understand IRQ protocols | ||
+ | * Unable to find handling protocol for Local Timer | ||
+ | |||
+ | ===Week 7=== | ||
+ | * Decided to use different timer from Local Timer | ||
+ | * Doesn't seem to have any supporting hardware documentation | ||
+ | * Leaves two options: core-specific timers and SoC clock | ||
+ | |||
+ | ===Week 8=== | ||
+ | * Found GPU routing register in BCM 2835 documentation | ||
+ | * Allows me to route interrupts from previously working SoC clock to any core | ||
+ | * Set up basic round-robin scheduler from SoC clock | ||
+ | * Unable to handle Interrupts on different cores | ||
+ | |||
+ | ===Week 9=== | ||
+ | * Found VBAR in ARM documentation, big thanks to Ben | ||
+ | * Able to handle IRQ's on non-0 cores now | ||
+ | * Preemptive round-robin scheduler working across all cores | ||
+ | * Made poster for poster presentation day | ||
+ | |||
+ | ===Week 10=== | ||
+ | * Gave poster presentation | ||
+ | * Worked on writing final paper | ||
+ | * Developed final presentation | ||
+ | * Gave final presentation |
Latest revision as of 16:51, 31 July 2018
Contents
Weekly Log
Week 1
- Orientation
- Met other REU students
- Familiarized with Git versions of Research Xinu
Week 2
- Worked with Rade Latinovich to become familiar with Research Xinu
- Initialized all cores to nullprocess
- Struggling with multicore resched
- All printing after shell established breaks shell, can this change?
Week 3
- Disabled shell to enable Kprintf
- Turned off single core clock
- Scheduled processes on all 4 cores without timer/preemption
- Shared ready list
- Locked ready list with Mutex
Week 4
- Tried to find documentation for BCM 2837 Chip
- Only able to find documentation for BCM 2835
- Decided to use Local Timer clock to generate interrupts
Week 5
- Set up Local Timer, enabling timer
- Unmasked Local Timer IRQ on routing side
- Enabling IRQ from Local Timer crashes program
- What is LT IRQ number on ARM side?
Week 6
- Poured through ARM A53 documentation to try to find IRQ num for Local Timer
- Looked over ARM vA7 documentation to understand IRQ protocols
- Unable to find handling protocol for Local Timer
Week 7
- Decided to use different timer from Local Timer
- Doesn't seem to have any supporting hardware documentation
- Leaves two options: core-specific timers and SoC clock
Week 8
- Found GPU routing register in BCM 2835 documentation
- Allows me to route interrupts from previously working SoC clock to any core
- Set up basic round-robin scheduler from SoC clock
- Unable to handle Interrupts on different cores
Week 9
- Found VBAR in ARM documentation, big thanks to Ben
- Able to handle IRQ's on non-0 cores now
- Preemptive round-robin scheduler working across all cores
- Made poster for poster presentation day
Week 10
- Gave poster presentation
- Worked on writing final paper
- Developed final presentation
- Gave final presentation