Difference between revisions of "User:Mxberner"
From REU@MU
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* Met the cohort, mentor, and research group. | * Met the cohort, mentor, and research group. | ||
* Reviewed potential subjects of research | * Reviewed potential subjects of research | ||
| − | - Updating Exploring CS curriculum | + | - [https://reu.cs.mu.edu/index.php/Energizing_ECS Updating Exploring CS curriculum] |
| − | - Porting Embedded XINU to Virgil Programming Language | + | - [https://reu.cs.mu.edu/index.php/Porting_Embedded_XINU_to_Virgil Porting Embedded XINU to Virgil Programming Language] |
| − | - Porting Embedded XINU to RISC-V Architecture | + | - [https://reu.cs.mu.edu/index.php/Porting_Embedded_XINU_to_RISC-V Porting Embedded XINU to RISC-V Architecture] |
* Researched RISC-V as a potential processor to port OS Xinu over to. | * Researched RISC-V as a potential processor to port OS Xinu over to. | ||
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* Completed RCR training modules through CITI program | * Completed RCR training modules through CITI program | ||
* Began research into Virgil | * Began research into Virgil | ||
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=== Week 2 (06/06/22 - 06/12/22) === | === Week 2 (06/06/22 - 06/12/22) === | ||
Revision as of 03:32, 9 June 2022
Max Berner
Marquette REU Summer 2022
Advisor: Dr. Brylow
Project: https://reu.cs.mu.edu/index.php/Porting_Embedded_XINU_to_Virgil
Weekly Logs
Week 1 (05/31/22 - 06/05/22)
- Met the cohort, mentor, and research group.
- Reviewed potential subjects of research
- Updating Exploring CS curriculum - Porting Embedded XINU to Virgil Programming Language - Porting Embedded XINU to RISC-V Architecture
- Researched RISC-V as a potential processor to port OS Xinu over to.
- RISC-V is most applicable for small devices with it's energy conservation and great performance for strictly simple tasks. - RISC refers to Reduced Instruction Set Computer - Advantage: Open-Source license that does not require fees to use - Advantage: Creating a custom chip is easier - Advantage: Base module is extremely limited, allowing customization/optimization. - Advantage: Power efficient, magnitudes less energy than CISC models. - Disadvantage: Not many purchasable, brand-name RISC-V processors available. - Disadvantage: With only simple instructions available, complex tasks are slower.
- Conducted personal research into single-board computers, hardware architecture, and assembly language to contextualize my research of RISC-V.
- Completed RCR training modules through CITI program
- Began research into Virgil
Week 2 (06/06/22 - 06/12/22)
- Officially began work on Porting Embedded XINU to Virgil Programming Language.
- Began contextual research into porting and operating systems.
- Began researching Embedded Xinu
- Virgil does not compile/execute to Windows OS, requiring some option for me to work from my laptop.
- Installed and set-up Debian, a Linux environment on my Windows computer through WSL.
- Executed a "Hello World!" written in Virgil on Debian
